The exponential increase in computational power over the last decades is running into a bottle-neck – the only way of getting more computing power per chip is to integrate multiple-cores, but the problem with multiple-cores is the complex wiring system, used for inter-core communication. This technology, developed at the Weizmann Institute of Science propose a radically new idea that replaces wires and fibers altogether, by an appropriately designed integrated optical chip layer that serves the same purpose with less complexity. It eliminates the use of wires thus saving valuable space, reducing power consumption and subsequently internal heat production. It further allows for high number of interconnected processors on the same chip and improves inter-core connectivity by 100-1000-fold, ultimately increasing computational power.
With the global race for more compact electronics, chipmakers are constantly seeking for innovative ways to reduce power consumption, component volumes, and heat production. In parallel, technology developments have increased end-user demands for faster and more efficient systems, requiring either increased clock-speed or multi-core processors and subsequent complex inter-core communication. Both alternatives suffer from major drawbacks as increased clock-speed results in higher power consumption and internal heat production, and efficient inter-core communication enabled by complex wire bus systems, takes space, consume energy, and produce excess heat. The only existing alternative to wires is optical fibers, which while reducing the internal heat production are still limited by complex wiring networks and one-dimensional optical data transmission. The stagnant clock rate, growing chip complexity, and the limiting number of integrated core processors, demands a robust inter-core data transmission platform that will be more efficient, less complex, and enable better multicore connectivity.
A single compact on-chip optical layer, compatible with CMOS fabrication technologies, that replaces the tangle of wires and fibers.
This invention designed by transformation optics, involves a compact optical bus, comprised of a planar waveguide on silicon chips where light is confined in a layer by total internal reflection. The layer is made of silicon that has a high refractive index, sandwiched between layers of silica (glass) with a much lower index. The height of the highly refractive layer is carefully designed to provide a specific refractive index profile, dictated by the layer thickness. A light management system selectively activates specific illumination ports embedded within the waveguide; the emanating light is then focused onto reflectors, or Bragg mirrors, which lead to light ray emission at specific partner points. In a similar manner, the light can be simultaneously focused onto a plurality of photodetectors within the waveguide, each of which communicates with a separate processor core. Bus geometry can be adjusted to match computer processor or core layout requirements.
A) Schematic top view of light propagation in a propagation layer for different optical bus geometries. (a) Absolute focusing: any number of points are optically connected (demonstrated for six points). These points can be located at any position on the ring (b) Rectangular waveguide structure. Communication is possible between multiple points and on different waveguides geometries. B) Electron-microscope images of a prototype manufactured by e-beam lithography. (a) Top view and (b) Side view: Bragg mirror around the device. C) Schematic cross-sectional view of an optical bus. 1,3: Lower and upper non-propagation layers; 2: light propagation layer, 4: Bragg mirror. The effective refractive index, defined by the thickness profile of the propagating silicon layer, causes light propagation to follow specific propagation paths with unique and exclusive sets of focal points.
- Direct and wireless inter-core communication
- Waveguide fabrication is compatible with traditional CMOS fabrication technologies
- Scaled-up connectivity of processor cores by 100-1000-fold
- Increased computing power
- Reduced electric power consumption
- Reduced heat output
- Space and energy efficient
- Point-to-point communication without crosstalk
The proposed innovation is applicable for a full range of markets integrating electronic technologies including:
- Consumer electronics
- Automatic car industry
- Hardware for deep-learning networks
- Signal processing
- Information processing
Miniature prototypes have been fabricated (Published in: O. Bitton, R. Bruch, and U. Leonhardt, Phys. Rev. Applied 10, 044059 (2018)). Future work will focus on developing models that match industry size and performance standards, to bring it closer to commercialization. A patent application was submitted for this invention.